This invention relates to data processing technique and to a technique which is effective particularly when applied to memory management in a system having a hierachal memory device. For example, the present invention relates to a technique which is effective when utilized in a memory management unit in a multi-processor system having at least two central processor units (CPUs) or microprocessors.
In data processing systems, so-called "multiprocessor systems" which include at least two CPUs are well known. In such a multiprocessor system, communication between CPUs becomes necessary. However, the conventional CPU is not equipped with means for direct communication with another CPU. Therefore, as shown in FIG. 9 of the accompanying drawings, there has been proposed a parallel communication system in which communication between two CPUs 1a and 1b is carried out through a common or shared memory 2 which is connected in common to these CPUs 1a and 1b.
In the multiprocessor system, local memories 3a and 3b are also provided in close connection with the CPUs under their control.